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| FDMA1025P Dual P-Channel PowerTrench(R) MOSFET December 2006 FDMA1025P Dual P-Channel PowerTrench(R) MOSFET -20V, -3.1A, 105m Features General Description This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultra portable applications. It features two independent P-Channel MOSFETs with low on-state resistance for minimum conduction losses. When connected in the typical common source configuration, bi-directional current flow is possible. The MicroFET 2X2 package offers exceptional thermal performance for its physical size and well suited to linear mode applications. Max rDS(on) = 155m at VGS = -4.5V, ID = -3.1A Max rDS(on) = 220m at VGS = -2.5V, ID = -2.3A Low profile - 0.8mm maximum - in the new package MicroFET 2X2 mm` RoHS Compliant tm Application DC - DC Conversion PIN 1 S1 G1 D2 D1 D2 D1 G2 S2 MicroFET 2X2 MOSFET Maximum Ratings TA = 25C unless otherwise noted Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation for Single Operation Power Dissipation Operating and Storage Junction Temperature Range (Note 1a) (Note 1b) (Note 1a) Ratings -20 12 -3.1 -6 1.4 0.7 -55 to +150 Units V V A W C Thermal Characteristics RJA RJA RJA RJA Thermal Resistance Single Operation, Junction to Ambient Thermal Resistance Single Operation, Junction to Ambient Thermal Resistance Dual Operation, Junction to Ambient Thermal Resistance Dual Operation, Junction to Ambient (Note 1a) (Note 1b) 86 173 69 151 C/W Package Marking and Ordering Information Device Marking 025 Device FDMA1025P Package MLP2X2 Reel Size 7'' Tape Width 8mm Quantity 3000 units (c)2006 Fairchild Semiconductor Corporation FDMA1025P Rev.B 1 www.fairchildsemi.com 4 3 D2 3 4 5 2 G1 2 5 6 1 S1 1 6 D1 G2 S2 FDMA1025P Dual P-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = -250A, VGS = 0V ID = -250A, referenced to 25C VDS = -16V, VGS = 0V TJ = 125C VGS = 12V, VDS = 0V -20 14 -1 -100 100 V mV/C A nA On Characteristics VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = -250A ID = -250A, referenced to 25C VGS = -4.5V, ID = -3.1A VGS = -2.5V, ID = -2.3A VGS = -4.5V, ID = -3.1A,TJ = 125C VDS = -5V, ID = -3.1A -0.4 -0.9 -3.8 88 144 121 6.2 155 220 220 S m -1.5 V mV/C Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = -10V, VGS = 0V, f = 1MHz 340 80 45 450 105 70 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge at 4.5V Gate to Source Gate Charge Gate to Drain "Miller" Charge VGS = 0V to -4.5V V = -10V DD ID = -3.1A VDD = -10V, ID = -3.1A VGS = -4.5V, RGEN = 6 5 14 13 8 3.4 0.8 1.0 10 26 24 16 4.8 ns ns ns ns nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = -1.1A (Note 2) -0.8 17 10 -1.2 26 15 V ns nC IF = -3.1A, di/dt = 100A/s Notes: 1: RJA is determined with the device mounted on a 1 in2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RJA is determined by the user's board design. (a)RJA =86C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5'x1.5'x0.062' thick PCB. (b)RJA =173C/W when mounted on a minimum pad of 2 oz copper. a. 86C/W when mounted on a 1in2 pad of 2 oz copper. b. 173C/W when mounted on a minimum pad. 2: Pulse Test: Pulse Width < 300s, Duty cycle < 2.0%. FDMA1025P Rev.B 2 www.fairchildsemi.com FDMA1025P Dual P-Channel PowerTrench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted 6 -ID, DRAIN CURRENT (A) 5 VGS = -4.5V VGS = -3.5V VGS = -2.5V VGS = -1.8V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 5 4 3 2 1 0 PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX VGS = -1.8V 4 3 2 1 VGS = -4.5V VGS = -2.5V VGS = -3.5V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 0 1 2 -VDS, DRAIN TO SOURCE VOLTAGE (V) 3 0 0 1 2 3 4 -ID, DRAIN CURRENT(A) 5 6 Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 500 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.6 1.4 1.2 1.0 0.8 0.6 -50 ID =-3.1A VGS = -4.5V ID = -3.1A PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 400 300 200 100 0 TJ = 25oC TJ = 125oC -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (oC) 150 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) 6 Figure 3. Normalized On Resistance vs Junction Temperature -IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance vs Gate to Source Voltage 10 VGS = 0V 6 -ID, DRAIN CURRENT (A) 5 4 3 2 1 TJ = -55oC TJ = 150oC PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 1 0.1 0.01 0.001 0.0001 0.0 TJ = 150oC TJ = 25oC TJ = -55oC TJ = 25oC 0 1.0 1.5 2.0 2.5 3.0 -VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 -VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMA1025P Rev.B 3 www.fairchildsemi.com FDMA1025P Dual P-Channel PowerTrench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted -VGS, GATE TO SOURCE VOLTAGE(V) 10 ID = -3.1A 1000 VDD = -8V Ciss 8 6 4 2 0 VDD = -10V VDD = -12V CAPACITANCE (pF) Coss 100 Crss f = 1MHz VGS = 0V 0 2 4 6 Qg, GATE CHARGE(nC) 8 10 0.1 1 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage P(PK), PEAK TRANSIENT POWER (W) 100 VGS = -4.5V FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 150 - T A ----------------------125 TA = 25oC 10 -ID, DRAIN CURRENT (A) rDS(on) LIMITE 100us 1ms 10ms 1 10 I = I25 0.1 SINGLE PULSE TJ = MAX RATED R JA 100ms 1s 10s DC =173 C/W o TA = 25OC 1 0.6 -4 10 SINGLE PULSE 0.01 0.1 1 10 10 -3 -VDS, DRAIN to SOURCE VOLTAGE (V) 10 10 10 10 t, PULSE WIDTH (s) -2 -1 0 1 10 2 10 3 Figure 9. Forward Bias Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation 1 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZJA 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA SINGLE PULSE 0.001 -4 10 10 -3 10 -2 10 -1 10 0 10 1 10 2 t, RECTANGULAR PULSE DURATION (s) Figure 11. Transient Thermal Response Curve www.fairchildsemi.com FDMA1025P Rev.B 4 FDMA1025P Dual P-Channel PowerTrench(R) MOSFET FDMA1025P Rev.B 5 www.fairchildsemi.com FDMA1025P Dual P-Channel PowerTrench(R) MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACT(R) FAST(R) FASTrTM FPSTM FRFETTM FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyBoostTM TinyBuckTM TinyPWMTM TinyPowerTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHC(R) UniFETTM UltraFET(R) VCXTM WireTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I21 FDMA1025P Rev. B 6 www.fairchildsemi.com |
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